Staff Engineer, Test #104
Member of the VLSI design team developing integrated ICs for the consumer electronic market. The team owns the design, verification and maintenance of all internal units of the chip under development and is responsible for the full chip flow as well.
This position requires performing of varied and complex assignments of the test engineering for custom ASIC devices. The candidate is expected to design and develop test procedures and assist in the evaluation of the test equipment. The candidate will also prepare recommendations for testing and documentation of procedures to be used from the product design phase through production. The candidate will be responsible for ensuring that all products meet quality and customer performance standards. The candidate will also provide training in new procedures to production testing staff.
Responsibilities include test insertion on large, multi-million gate ASICs (mux-scan FF, 1149.1 /1149.6 boundary scan, memory BIST, logic BIST), test logic functional verification, and test vector generation (ATPG for stuck-at, transition delay, datapath), and fault grading.
Among other things, the candidate will be directly responsible for:
Designing and writing test plans.
Designing and documenting hardware - fixtures, probe cards, load boards.
Coordinating purchase of all hardware.
Writing programs for existing products.
Writing programs for new products.
Performing bench-to-ATE correlation, measuring repeatability, and calculating limits.
Managing all aspects of datafiles.
Writing documentation - test spec, test program description, test procedures.
Releasing to Production.
Training Production Operators and Technicians.
Training other Test Engineers.
Helping define company test strategy.
Bringing up new test platforms.
The following traits are highly valued:
Demonstrated record of releasing high volume products into production environment.
Demonstrated support of off-shore test floor.
RF wafer probe experience in a high volume environment.
Solid understanding of multiple programming languages including CVI.
Strong statistical background.
Self-starter, able to work with minimal supervision.
Excellent problem solving skills.
Must have an engineering degree Electronic Engineering or Computer Engineering.
At least 3-5 years of experience.
UNIX scripting skills (Tcl, Perl, shells, etc.).
Hands on experience with all relevant post-silicon testing tools: Synopsys DFT Compiler, BSD Compiler, TetraMax, VCS.
Familiarity with various fault models for DSM.
Should have exposure and good understanding of back-end design flow.
Experience with IC testers, and with the production flow (from wafer fabrication to packaged silicons).
Excellent communication skills in Hebrew and English (written and verbal) and good interpersonal skills.
Experience with video and SoC BIST systems.
Knowledge of IC testers (HP9300 Preferred).
University grades pre-requisite
Technion/Tel-Aviv University graduates GPA over 80.
Other Universities, GPA over 90.
The position applies for both men/women.
Please send potential applicant's CV's to: